An efficient hardware-optimized Physical Random Access Channel (PRACH) baseband signal generation algorithm and its ASIC implementation in the LTE user equipment (UE) transmitter are presented in this paper. A simplified DFT of the Zadoff-Chu (ZC) sequence as well as a phase computation are applied to the prime size DFT of the PRACH preamble and the large size IDFT is accomplished by groups of smaller size IFFTs. The optimized algorithm achieves significantly lower computational complexity compared with the original algorithm in the LTE specification and better performance compared to another publication. The ASIC architecture is also designed to reduce the memory size and logic complexity, which achieves a low hardware cost in terms of the cell area. The proposed design was implemented in 65nm CMOS and it was demonstrated that this design can satisfy the timing requirements of the LTE specification.